1. Field of the Invention
The present invention relates to a serial access memory and a data write/read method applicable thereto.
2. Prior Art
In the digital processing of the video signal relating to a television (TV) and a video tape recorder (VTR), the video signal is converted into the digital data by means of an analog-to-digital (A/D) converter and is then spread out and stored in a predetermined video memory. If it is needed to execute such a inter-frame operation as represented by a three dimensional Y/C isolation, a frame memory capable of storing the data equivalent to one video frame is used as a video memory.
In general, the frame memory is provided with a serial access memory (SAM) which serves to serially input the data to and output the data from the frame memory. Prior art serial access memories are classified into two types according to their way of accessing, that is, one being a line access type and the other a First In First Out (FIFO) type.
The FIFO type serial access memory does not need any address input from the outside. In the serial access memory of this type, the write operation and the read operation as well are equally commenced with the input of a reset signal. With start of the write operation, the video data is continuously written in sequence in all the memory cells, starting from the memory cell of the leading address. Also, with start of the read operation, the storage data of the memory cells are continuously read out in sequence from all the memory cells, starting from the memory sell of the leading address.
In case of the line access type serial access memory, on one had, in starting the write/read operation, one word line is selected from among a plurality of word lines according to the address as inputted externally, and the access is made to a plurality of memory cells connected with the selected word line. Like this, according to the line access type serial access memory, the line address can be set at random, so that the video data for a split edit display and a child display as well can by supplied to a display.
The FIFO type serial access memory and the line access type serial access memory are equally provided with a write register for temporarily storing the data to be written in the memory cell array, and a read register for temporarily storing the data read out from the memory cell array. Furthermore, the FIFO type serial access memory is provided with a write/read register besides the write register and the read register. This write/read register serves to store the data which includes in part the serial data inputted to the serial access memory, that is, includes by a predetermined number of bits counted from the leading bit.
In the serial access memory, when the data is transferred from the write register to the memory cell array or from the memory cell array to the read register, one word line is specified and selected from among the plural word lines. In this case, however, a time of 200 to 300 ns has to be spent until the electric potential of the selected word line reaches a predetermined level. Moreover, in the serial access memory, since the read operation and the write operation are executed in a synchronism with each other, there might happen that the data transfer operation from the write register to the memory cell array in the write operation overlaps with the data transfer operation from the memory cell array to the read register in the read operation. In addition to this, there might happen that the self-refresh operation might overlap with the above two operations.
Therefore, in order to start the substantial data write operation to the memory cell array or the substantial data read operation from the memory cell array after inputting the address externally, it required to allow a predetermined time (i.e. wait time: about 1.5 fÊs) to pass away.
In this respect, the FIFO type serial access memory is provided with the write/read register as described above, so that the access to this write/read register is carried out while the electric potential of the selected word line reaches the predetermined level. Accordingly, different from the line access type serial access memory, the substantial write/read operation may be commenced immediately after the reset signal is inputted.
As described above, two types of the prior art serial access memory are available and they are characterized by their own functions, respectively. Thus, either the line access type or the FIFO type is selected so as to meet the specification of a given system into which the serial access memory is to be incorporated.
However, even through one of the serial access memories of the above two types is selected, it might happen that the function of the other type becomes necessary. For instance, the FIFO type serial access memory is unable to designate the address at random. Accordingly, a special method is required when executing the image processing such as the line interpolation by means of the serial access memory of this type. To put it concretely, while the word line is selected in sequence starting from the word line of the leading address, it is needed to prevent any storage data of the memory cell array from being read out therefrom by keeping the read enable signal in the inactive state until the word line of a predetermined address is selected.
The invention has been made in view of the problems as mentioned above and its object is to provide a serial access memory having both functions of the prior art line access memory of the line access type and the prior art line access memory of FIFO type as well, and capable of properly choosing and executing a suitable data write/read operation in a given system, and further, to provide a data write/read method applicable to such a serial access memory.
In order to solve the problems as described above, according to the first aspect of the invention, there is provided a serial access memory which is characterized by including a plurality of memory cells which are arranged at each of intersections made by a plurality of word lines and a plurality of bit lines; the first register having a capacity capable of storing a data of one word to be stored in the plural memory cells connected with each of the plural word lines, and after storing an input serial data of one word, transferring the stored one word data to plural memory cells connected with one word line selected from among the plural word lines; the second register having a capacity capable of storing one word data to be stored in the plural memory cells connected with each of the plural word lines, receiving the storage data of one word transferred from the plural memory cells connected with one word line selected from among the plural word lines, and outputting the transferred one word data as an output serial data of one word; and the third register having a capacity capable of storing one word data to be stored in the plural memory cells connected with each of the plural word lines, and after storing an input serial data of one word, outputting it as an output serial data of one word. According to the structure of the serial access memory as described above, it becomes possible to store, in the third register, the same data as that which is stored in the first register and transferred to the plural memory cells connected with the selected word line. Therefore, in case of reading out the data stored in the plural memory cells connected with the selected word line, it becomes possible to read out the data stored in the third register instead of the data stored in the memory cells.
The serial access memory may include a common address selector capable of outputting an address signal to the second and third registers, respectively. With this structure, it becomes possible for the second and third registers to serially output their storage data, respectively, according to the address signal outputted from the common address selector. With this, the electronic circuit scale of the serial access memory is made smaller as compared with the case where the second and third registers are separately provided with an address selector.
The serial access memory according to the invention may be provided with a data transfer block which transfers the storage data of the first register to the third register. This structure makes it possible to transfer the storage data of the first register to the third register all at once. Accordingly, the time required for storing the data is reduced as compared with the case that the serial data is separately stored in the third register.
According to the second aspect of the invention, there is provided a data write/read method of a serial access memory including a plurality of memory cells which are arranged at each of intersections made by a plurality of word lines and a plurality of bit lines, the first register having a capacity capable of storing a data of one word to be stored in the plural memory cells connected with each of the plural word lines, the second register having a capacity capable of storing a data of one word to be stored in the plural memory cells connected with each of the plural word lines, and the third register having a capacity capable of storing a data of one word to be stored in the plural memory cells connected with each of the plural word lines. This data write/read method of a serial access memory is characterized by including the first write step of storing an input serial data of one word in the first register and the third register as well; the second write step of transferring the one word data stored in the first register according to the first write step, to the plural memory cells connected with one word line selected from among the plural word lines; the third write step of storing, in the first register, an input serial data of one word next to the input serial data of one word stored in the first register and the third register as well according to the first write step; and the fourth write step of transferring the one word data stored in the first register according to the third write step, to the plural memory cells connected with the other word line selected from among the plural word lines. According to this method, the same data as the storage data of the third register comes to be stored in the plural memory cells connected with the one word line, to which the data is transferred from the first register according to the second write step.
According to the third aspect of the invention, there is provided a data write/read method applicable to the above-mentioned serial access memory. This data write/read method is characterized by including the first write step of storing an input serial data of one word in the first register; the second write step of transferring the one word data stored in the first register according to the first write step, to the plural memory cells connected with one word line selected from among the plural word lines as well as to the third register; the third write step of storing in the first register an input serial data of one word next to the input serial data of one word stored in the first register according to the first write step; and the fourth write step of transferring the one word data stored in the first register according to the third write step, to the plural memory cells connected with the other word line selected from among the plural word lines. According to this method, the same data as the storage data of the third register comes to be stored in the plural memory cells connected with the one word line, to which the data is transferred from the first register according to the second write step. Moreover, it becomes possible to transfer the storage data of the first register to the third register all at once. Accordingly, the time required for and the electric power consumed in writing the data is reduced as compared with the case where the serial data of one word is separately stored in the third register.
According to the fourth aspect of the invention, there is provided a data write/read method applicable to the above-mentioned serial access memory. This data write/read method is characterized by including the first write step of storing an input serial data of one word in the first register; the second write step of transferring the one word data stored in the first register according to the first write step, to the third register; the third write step of storing in the first register an input serial data of one word next to the input serial data of one word stored in the first register according to the first write step; the fourth write step of transferring the one word data stored in the first register according to the third write step, to the plural memory cells connected with one word line selected from among the plural word lines; the fifth write step of storing in the first register an input serial data of one word next to the input serial data of one word stored in the first register according to the third write step; and the sixth write step of transferring the one word data stored in the first register according to the fifth write step to the plural memory cells connected with the other word line selected from among the plural word lines. According to this method, since no overlap storage by the storage data of the third register is caused in the plural memory cells connected with each word line, efficiency of the write operation is improved.
Furthermore, the data write/read method of the serial access memory according to the invention is characterized by including the first read step of transferring a storage data of one word from the plural memory cells connected with the one word line to the second register; the second read step of outputting the storage data of one word transferred to and stored in the second register according to the first step as an output serial data of one word; the third read step of transferring a storage data of one word from the plural memory cells connected with a word line other than the one word line to the second register; and the fourth read step of outputting the data transferred to and stored in the second register according to the third read step as an output serial data of one word. Still further, the method may additionally include the first read step of outputting the data stored in the third register as an output serial data of one word; the second read step of transferring a storage data of one word to the second register from the plural memory cells connected with a word line other than the one word line; and the third read step of outputting the data transferred from and stored in the second register according to the second read step as an output serial data of one word.
The data write/read method of the serial access memory according to the invention is characterized by including the first read step of outputting the data stored in the third register as an output serial data of one word; the second read step of transferring a storage data of one word from the plural memory cells connected with the one word line to the second register; the third read step of outputting the data transferred to and stored in the second register according to the second read step as an output serial data of one word; the fourth read step of transferring the storage data of one word from the plural memory cells connected with a word line other than the one word line to the second register; and the fifth read step of outputting the data transferred to and stored in the second register according to the fourth step as an output serial data of one word.
The second read step may be executed in parallel with the first read step, thereby making it possible to reduce the time required for the data read.
According to the fifth aspect of the invention, there is provided a data write/read method applicable to a serial access memory which includes a plurality of memory cells which are arranged at each of intersections made by a plurality of word lines and a plurality of bit lines, the first register having a capacity capable of storing a data of one word (m bits) to be stored in the plural memory cells connected with each of the plural word lines, the second register having a capacity capable of storing a data of one word (m bits) to be stored in the plural memory cells connected with each of the plural word lines, and the third register having a capacity (p bits) smaller than the capacity capable of storing a data of one word (m bits) to be stored in the plural memory cells connected with each of the plural word lines. This data write/read method is characterized by including the first write step of storing the first bit through the pth bit of an input serial data of one word in the third register; the second write step of storing the (p+1)th bit through the mth bit of the input serial data of one word in the first register; the third write step of transferring the (p+1)th bit through the mth bit of the data stored in the first register according to the second write step, to the plural memory cells connected with one word line selected from among the plural word lines; the fourth write step of storing, in the first register, an input serial data of one word next to the input serial data of one word stored in the third register as well as in the first register according to the second write step; and the fifth write step of transferring the one word data stored in the first register according to the fourth write step, to the plural memory cells connected with a word line other than the one word line.
According to the invention, a data write/read method of the serial access memory includes the first read step of transferring a storage data of one word from the plural memory cell connected with the one word line to the second register; the second read step of outputting the data stored in the third register as an output serial data of one word having a length of p bits; the third read step of outputting the (p+1)th bit through the mth bit among the data transferred to and stored in the second register according to the first read step, as an output serial data; the fourth read step of transferring a storage data of one word from the plural memory cells connected with a word line other than the one word, to the second register; and the fifth read step of outputting the data transferred to and stored in the second register according to the fourth read step, as a output serial data of one word.
Furthermore, according to the invention, a data write/read method of the serial access memory includes the first read step of outputting the data stored in the third register as an output serial data having a length of p bits; the second read step of transferring the storage data of the plural memory cells connected with the one word line to the second register in parallel with the first read step; the third read step of outputting the (p+1)th bit through the mth bit among the data ransferred to and stored in the second register according to the second read step, as an output serial data; the fourth read step of transferring the storage data of one word from the plural memory cells connected with a word line other than the one word line to the second register; and the fifth read step of outputting the data transferred to and stored in the second register according to the fourth read step as an output serial data of one word.
A serial access memory and a data write/read method according to the invention will now be described in detail by way of several exemplary preferred embodiments of the invention with reference to the accompanying drawings as listed as follows. In the following description and accompanying drawings, like parts constituting the invention are denoted with like reference numerals and symbols in order to avoid the repetitive redundant description.